1. Field of the Invention
The present invention relates generally to integrated circuit technology and, more specifically, the present invention relates to controlling the temperature of an integrated circuit.
2. Background Information
Within the integrated circuit industry there is a continuing effort to increase integrated circuit speed as well as device density. As a result of these efforts, there is a trend towards using flip-chip technology when packaging complex high speed integrated circuits. Flip-chip technology is also known as Control Collapse Chip Connection (C4) packaging. In C4 packaging technology, the integrated circuit die is flipped upside down relative to integrated circuit dies that are packaged using wire bond technology.
During the testing or debugging of an integrated circuit, it is often desirable to operate the integrated circuit in its native packaging environment and at the full intended operating speed of the integrated circuit. Since the power density in modern integrated circuits is typically very high, it is desirable to remove heat generated by these integrated circuits in order to reduce the risk of the integrated circuits from being subjected to excessive heat. If the temperature of the integrated circuit is not properly controlled, the performance of the circuit may be affected. In some instances, component degradation will occur if the temperature of the integrated circuit is not properly regulated. Thus, any debug information collected should be obtained with the temperature of the integrated circuit regulated. Otherwise, any debug information obtained may not be useful.
As depicted in FIG. 1A, the removal of heat from a wire bonded semiconductor device 101 generally involves attaching a finned heat sink 103 to a bottom surface 107 of a package 111 and passing an air flow 109 over heat sink 103. A heat flow path is established across a back side surface 105 of semiconductor device 101 through package 111 and into heat sink 103. A heat slug (not shown) that may be embedded within package 111 thermally couples semiconductor device 101 to heat sink 103. Heat is then carried away by air flow 109 passing across heat sink 103.
FIG. 1B illustrates the removal of heat from a wire bonded semiconductor die 131 during silicon debug. As shown in FIG. 1B, semiconductor die 131 is packaged in a wire bond package 141 that is mounted on a circuit board 145. Probe tool 143 is part of an electron beam (e-beam) system used to debug semiconductor die 131 while operating in a vacuum chamber. With direct unobstructed access to semiconductor die 131, probe tool 143 may be used to obtain information from semiconductor die 131 while operating.
Since semiconductor die 131 is operated in a vacuum, the normal cooling mechanisms that rely on the circulation of air are not available. A cooling technique commonly used in present day e-beam probing systems employs the use of a cooling block 149, which is thermally coupled to a bottom surface 147 of package 141. Heat generated by semiconductor die 131 is transferred through package 141 to cooling block 149. Coolant 151 is circulated through cooling block 149 to regulate the temperature of cooling block 149, and thus regulate the temperature of semiconductor die 131.
FIG. 2 illustrates heat being dissipated from a C4 packaged semiconductor die 201. Heat is removed from a back side surface 205 of semiconductor die 201 by passing an air flow 209 over a finned heat sink 203 that is thermally coupled to back side surface 205. In some high power applications, heat is dissipated from semiconductor die 201 by attaching a thermally conductive heat slug (not shown) to back side surface 205 and then thermally coupling the heat slug to a heat sink (not shown). In some instances, the heat slug is thermally coupled to a metal plate having a large thermal mass and a large heat transfer area. In other instances, the heat slug may be thermally coupled to a heat spreading plate by heat pipe or some other low resistance thermal path. It is noted that heat is generally not dissipated through package 207 as solder bumps 211 are generally not considered to be good thermal conductors. Moreover, package 207 may be an organic package, and therefore have the characteristics of a thermal insulator.
When debugging a semiconductor die 201 with a probing system, such as for example an e-beam system, it is desired that back side surface 205 be exposed to provide direct unobstructed access with the e-beam probe tool. However, as described in FIG. 2, a heat sink 203 is normally utilized in C4 packaging to remove heat from semiconductor die 201. If heat sink 203 is removed from semiconductor die 201 for debug purposes, continuous operation of the integrated circuit during analysis may damage the circuits of semiconductor die 201. In addition, if C4 mounted semiconductor die 201 is operated in a vacuum chamber of an e-beam probing system, the normal cooling mechanisms such as conduction are not available. Without the ability to regulate the temperature of semiconductor die 201, sustained operation of semiconductor die 201 at full operating speeds may result in circuit degradation and/or damage.